1. Field of the Invention
The present invention relates to a data output apparatus and data output method when playing back data at 2× speed in VTRs.
2. Description of the Related Art
HDCAM SR® format that has been proposed by the present applicant is a VTR format compliant with full high vision video with a resolution of 1920H×1080V. According to HDCAM SR® format, a recording region for video data of one field is divided into a start region and an end region of each track and a recording region for audio data of one field is provided in between such regions. The sampling frequency of the audio data is 48 kHz. Twelve channels are provided for audio data, and data on the first channel to the twelfth channel is recorded in that order in the recording region for audio data of one field.
When recording video data with a field frequency of 59.94 Hz, the sampling rate of the audio data is not an integer multiple of the field frequency and the number of samples of audio data in one field is calculated as (1/59.94 Hz)/(1/48 kHz)=800.8.
As shown in FIG. 1, in such a case, data is handled in units of five consecutive fields and “audio1(800)” with 800 samples is recorded corresponding to the video data “picture1” of the first field and audio data “audio2(801)” to “audio5(801)” that each have 801 samples are recorded corresponding to the video data “picture2” to “picture5” of the second to fifth fields.
FIG. 2 is a diagram showing the recording positions of the video data “picture1” to “picture5” and the audio data “audio1(800)” to “audio5(801)” on a magnetic tape. The video data “picture1” of the first field is divided into the start region and end region of the track (the divided two pieces of video data are indicated in FIG. 2 as “picture1 (1/2)” and “picture1 (2/2)”) and the audio data “audio1(800)” is recorded in the space between such regions. The same also applies to the second to fifth fields. Note that although the case where the video data of one field is recorded on only one track is shown for convenience in FIG. 2, the video data of one field is actually recorded using twelve tracks.
Although not shown in FIG. 2, start signals showing the start of data are recorded before the respective recording positions of the video data “picture1” to “picture5” (i.e., at the first positions read by a magnetic head). Also, “5-field” IDs that identify the ordinal positions of the respective audio data that form a five-field unit are recorded before the respective recording positions of the audio data “audio1(800)” to “audio5(801)”, thereby making it possible to identify whether the respective audio data have 800 or 801 samples. Such “5-field” IDs take the values 0 to 4. with the value 0 showing the audio data corresponding to the first field where the number of samples is 800 and the values 1, 2, 3. and 4 showing the audio data corresponding to the second, third, fourth, and fifth fields where the number of samples is 801.
According to HDCAM SR® format, 1× speed mode (where the data rate of video data is 440 Mbps) and 2× speed mode (where the data rate of video data is 880 Mbps) are supported as recording and playback modes. Accordingly, it is possible to play back data, which was recorded at 1× speed, at 1× speed and also possible to play back data, which was recorded at 1× speed, at 2× speed.
1× Speed Playback
FIG. 3 is a block diagram showing an output system for audio data in an HDCAM SR®-format video tape recorder where video data with a field frequency of 59.94 Hz is played back at 1× speed and transmitted as an HD-SDI signal according to SMPTE 292M. After waveform shaping and a decoding process have been carried out in a decoding unit 20 on the signal read out from a magnetic tape TP by a playback head PB, error correction is carried out in a ECC decoder 21. Subsequently, audio data that has been subjected to error correction is outputted from the ECC decoder 21 to an audio processor 22.
The audio processor 22 outputs the audio data to an HD-SDI transmitter 23 as audio data to be embedded in video data.
FIGS. 4A and 4B are diagrams showing audio data outputted from the ECC decoder 21 and audio data outputted from the HD-SDI transmitter 23. As shown in FIG. 4A, audio data that was consecutive in the original audio, such as “audio1(800)”, “audio2(801)”, “audio3(801)”, “audio4(801)”, “audio5(801)”, . . . is outputted from the ECC decoder 21 to the audio processor 22.
The audio processor 22 outputs such audio data in the same order of “audio1(800)”, “audio2(801)”, “audio3(801)”, “audio4(801)”, “audio5(801)”, . . . to the HD-SDI transmitter 23. As shown in FIG. 4B, although the audio data outputted from the HD-SDI transmitter 23 is embedded into spaces between the video data and therefore appears to be divided into field units, the data is still consecutive in the original order of “audio1(800)”, “audio2(801)”, “audio3(801)”, “audio4(801)”, “audio5(801)”, . . . .
FIG. 5 is a diagram showing details of the channels of audio data outputted from the audio processor 22. Here, it is possible to embed sixteen channels of audio data in an HD-SDI signal. The HD-SDI transmitter 23 is therefore provided with eight input terminals I1 to 18 for inputting sixteen channels of audio data. The audio processor 22 outputs audio data on two channels in each sampling period to six input terminals I1 to I6 out of the eight input terminals.
Specifically, the audio processor 22 outputs the audio data as shown below to the input terminals I1 to I6 in a given sampling period SC1.                ch1_0 that is part of the data on channel ch1 and ch2_0 that is part of the data on channel ch2 are outputted to the input terminal I1.        ch3_0 that is part of the data on channel ch3 and ch4_0 that is part of the data on channel ch4 are outputted to the input terminal I2.        ch5_0 that is part of the data on channel ch5 and ch6_0 that is part of the data on channel ch6 are outputted to the input terminal I3.        ch7_0 that is part of the data on channel ch7 and ch8_0 that is part of the data on channel ch8 are outputted to the input terminal I4.        ch9_0 that is part of the data on channel ch9 and ch10_0 that is part of the data on channel ch10 are outputted to the input terminal I5.        ch11_0 that is part of the data on channel ch11 and ch12_0 that is part of the data on channel ch12 are outputted to the input terminal I6.        
The audio processor 22 outputs the following audio data to the input terminals I1 to I6 in the next sampling period SC2.                ch1_1 that follows ch1_0 in the data on channel ch1 and ch2_1 that follows ch2_0 in the data on channel ch2 are outputted to the input terminal I1.        ch3_1 that follows ch3_0 in the data on channel ch3 and ch4_1 that follows ch4_0 in the data on channel ch4 are outputted to the input terminal I2.        ch5_1 that follows ch5_0 in the data on channel ch5 and ch6_1 that follows ch6_0 in the data on channel ch6 are outputted to the input terminal I3.        ch7_1 that follows ch7_0 in the data on channel ch7 and ch8_1 that follows ch8_0 in the data on channel ch8 are outputted to the input terminal I4.        ch9_1 that follows ch9_0 in the data on channel ch9 and ch10_1 that follows ch10_0 in the data on channel ch10 are outputted to the input terminal I5.        ch11_1 that follows ch11_0 in the data on channel ch11 and ch12_1 that follows ch12_0 in the data on channel ch12 are outputted to the input terminal I6.        
In the same way, in each sampling period, data on the channels ch1 and ch2 is outputted as a unit to the input terminal I1, data on the channels ch3 and ch4 is outputted as a unit to the input terminal I2, data on the channels ch5 and ch6 is outputted as a unit to the input terminal I3, data on the channels ch7 and ch8 is outputted as a unit to the input terminal I4, data on the channels ch9 and ch10 is outputted as a unit to the input terminal I5, and data on the channels ch11 and ch12 is outputted as a unit to the input terminal I6.
×2 Speed Playback
An example where 1× speed playback is carried out has been described above. Next, an example where data recorded at 1× speed is played back at 2× speed is described. In the case where video data played back at 2× speed is transmitted as an HD-SDI signal, a LINK-A HD-SDI transmitter and a LINK-B HD-SDI transmitter that comply to dual-link HD-SDI as standardized in SMPTE 372M (see SMPTE 372M PROPOSED SMPTE STANDARD for Television—Dual LINK 292M Interface for 1920×1080 Picture Raster) are required.